16 bit Assembly
ADC - Add with Carry
ADD - Add
AND - Bitwise AND
CALL - Call Routine
CLC - Clear Carry Flag
CLD - Clear Direction
CLI - Clear Interupt Flag
CMPS - Compare
CMP - Compare
DEC - Decrement
DIV - Divide
HLT - Halt
IDIV - Divide Signed
IMUL - Multiply Signed
INC - Increment
INS - Input
INT - Interupt
IN - Input
IRET - Interupt Return
JMP - Jump
J - Jump Conditional
LAHF - Load Flags
LDS - Load Far Pointer
LEA - Store Address
LES - Load Far Pointer
LFS - Load Far Pointer
LGS - Load Far Pointer
LODSB - LODSW - Load
LODS - Load
LOOP - Loop
LSS - Load Far Pointer
MOVSB - Move Far
MOVSW - Move Far
MOVS - Move
MOV - Move
MUL - Multiply
NEG - Negate
NOP - No Operation
NOT - Bitwise NOT
OR - Bitwise OR
OUTS - Output
OUT - Output
POP - Stack Retrieval
PUSH - Stack Store
RCL - Roll Left
RCR - Roll Right
REP - Repeat
RET - Return
ROL - Roll Left
ROR - Roll Right
SAHF - Save Flags
SAL - Shift Left
SAR - Shift Right
SBB - Subtract with Borrow
SCAS - Compare
SET - Set Condition
SHL - Shift Left
SHR - Shift Right
STC - Set Carry Flag
STD - Set Direction
STI - Set Interupt Flag
STOSB - STOSW - Store
STOS - Store
SUB - Subtract
TEST - Compare
XADD - Exchange and And
XCHG - Swap
XOR - Bitwise XOR
The SAR instruction is used to perform an arithmetic shift right, resulting in a signed division.
As each bit is shifted, it passes in to the Carry flag, where it can be assessed using a conditional jump JC or JNC.
As each bit moves right the highest bit becomes zero.
This command has 3 part the Instruction, A Register or memory address, and the number of bits to shift right.
Assembly
SampleDescription 16 bit Machine
CodeSAR AL, 1 ; Shift AL right by 1 bit D0 F8 SAR AL, CL ; Shift AL right by value of CL D2 F8 SAR AL, 0x03 ; Shift AL right by 8 bit immediate C0 F8 03 SAR AX, 1 ; Shift AL right by 1 bit D1 F8 SAR AX, CL ; Shift AL right by value of CL D3 F8 SAR AX, 0x03 ; Shift AL right by 8 bit immediate C1 F8 03 SAR [BX], 1 ; Shift memory address right by 1 bit D1 3F SAR [BX], CL ; Shift memory address right by value of CL D3 3F SAR [BX], 0x03 ; Shift memory address right by 8 bit
; immediateC1 3F 03 SAR [BX+2], 1 ; Shift memory address right by 1 bit D1 7F 02 SAR [BX+2], CL ; Shift memory address right by value of CL D2 7F 02 SAR [BX+2], 0x03 ; Shift memory address right by 8 bit
; immediateC1 7F 02 03