TEST - Logical Comparison Instruction

The TEST instruction AND's the operands, and discards the result.

The effect of the AND operation sets the Parity (PF), Sign (SF) and Zero (ZF) flags.

This command has 3 parts, Instruction, Register or memory address, then either a Register, Immediate value or a memory address.

Assembly
Sample Description 16 bit Machine
Code

TEST AL, 0x30 ; 8 bit immediate to AL Register A8 30

TEST CL, 0x30 ; 8 bit immediate to 8 bit Register F6 C1 30

TEST AX, 0x3030 ; 16 bit immediate to AX Register A9 30 30

TEST CX, 0x3030 ; 16 bit immediate to a Register F7 C1 30 30

TEST [BX], 0x3030 ; 16 bit immediate to memory address F7 47 30 30

TEST [BX+2], 0x3030 ; 16 bit immediate to memory address
; with offset F7 47 02 30 30

TEST [BX], AX ; 16 bit Register to memory address 85 47

TEST [BX+2], AX ; 16 bit Register to memory address
; with offset 85 47 02

TEST AX, CX ; 16 bit Register to a Register 85 C1

Assembly Sample	Description	16 bit Machine Code
TEST AL, 0x30	; 8 bit immediate to AL Register	A8 30
TEST CL, 0x30	; 8 bit immediate to 8 bit Register	F6 C1 30
TEST AX, 0x3030	; 16 bit immediate to AX Register	A9 30 30
TEST CX, 0x3030	; 16 bit immediate to a Register	F7 C1 30 30
TEST [BX], 0x3030	; 16 bit immediate to memory address	F7 47 30 30
TEST [BX+2], 0x3030	; 16 bit immediate to memory address ; with offset	F7 47 02 30 30
TEST [BX], AX	; 16 bit Register to memory address	85 47
TEST [BX+2], AX	; 16 bit Register to memory address ; with offset	85 47 02
TEST AX, CX	; 16 bit Register to a Register	85 C1